IEEE 1581-2025

Anotace textu normy IEEE 1581-2025 :

Revision Standard - Active.

A low-cost method for testing the interconnection of discrete, complex memory integrated circuits (ICs), where additional pins for testing are not available and implementing boundary scan (IEEE Std 1149.1™) is not feasible, is defined in this standard. The implementation rules for the test logic and test mode access/exit methods in conformant ICs are described. The standard is limited to the behavioral description of the implementation and will not include the technical design for the test logic or test mode control circuitry.

ISBN: 979-8-8557-2624-4, 979-8-8557-3404-1, 979-8-8557-3405-8

Number of Pages: 102

Product Code: STDAPE28262, STD28802, STDPD28802

Keywords: board test, connectivity test, IEEE 1581™, integrated circuit, interconnect test, interconnection test, memory device, test logic, test mode, transparent test mode

Category: Test Technology

Draft Number: P1581/D2.22, Aug 2025 - APPROVED DRAFT