Standard for Verilog register transfer level synthesis.
NORMA vydána dne 5.12.2005
Designation standards: BS IEC 62142:2005
Note: NEPLATNÁ
Publication date standards: 5.12.2005
The number of pages: 112
Approximate weight : 367 g (0.81 lbs)
Country: British technical standard
Kategorie: Technické normy BS